[2027 Internship] Physical Verification CAD Intern I
MediaTek·Singapore·Electrical Engineering
MediaTek is hiring a [2027 Internship] Physical Verification CAD Intern I in Singapore. Posted 2026-08-20; applications close 2026-10-19 (in 58 days).
Role details
Intern - IC Design Checks (Design Rule Checks and Automation)
MediaTek is a young and innovative company always looking to create effective solutions to existing problems. We seek like-minded individuals to join us as interns—people with the spark to innovate, the motivation to learn, and the ability to perform and deliver as part of a team.
Our team focuses on design checks to ensure the electrical performance, logic correctness, and manufacturability of an IC chip—one of the most important backend signoff milestones in chip design. Interns will join a larger team working on in-house design rule definition and coding for advanced, mature technology nodes, as well as scripting automation for design checks.
Responsibilities
- Learn design rule check (DRC) coding
- Execute design rule checks on chip design and regression structures
- Study test regression structures for in-house design rules
- Debug existing rule code against regression structures
- Learn in-house design check definition methodology
- Support basic scripting automation
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Applying to this role
This [2027 Internship] Physical Verification CAD Intern I role at MediaTek runs through the firm's own careers portal and expects a CV and cover letter written specifically for the posting, not a portable submission carried across firms. Jorb AI's application agent tailors a CV and cover letter from your background to this posting and tracks the role alongside the rest of your applications.
Jorb AI tracks details for [2027 Internship] Physical Verification CAD Intern I at MediaTek. Postings refresh hourly from primary careers pages. Job details mirror the firm's posting; the apply link goes directly to the source. Last refreshed 2026-08-21.
