Power Technology Development Integration Intern (Jan-Jun 2027)

GlobalFoundries·Singapore·Electrical Engineering

GlobalFoundries is hiring a Power Technology Development Integration Intern (Jan-Jun 2027) in Singapore. Posted 2026-08-23; applications close 2026-10-22 (in 46 days).

Role details

About GlobalFoundries

GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Internship Program Overview

Our interns and co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with meaningful work experience that equips them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you’ll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives.

Summary of Role

We are looking for a Power Technology Development Integration Intern to support the development and characterization of our latest 55BCDL-Gen2 technology. You will gain hands-on experience in semiconductor process integration, device and SRAM characterization, yield analysis, physical failure analysis (SEM/TEM), and process optimization. Working closely with engineers, you will help evaluate device performance, identify improvement opportunities, and contribute to process and design enhancements to meet product requirements.

Essential Responsibilities

  • Support the development and characterization of the latest 55BCDL-Gen2 technology, with a focus on process integration optimization and performance improvement.
  • Develop an understanding of Core, I/O, and SRAM device architectures, including electrical characteristics and reliability requirements.
  • Perform SRAM yield analysis to identify yield detractors and recommend improvement opportunities.
  • Conduct process physical analysis, such as SEM and TEM, and correlate physical characteristics to electrical and reliability performance.
  • Evaluate and optimize process stability, such as inline/ET Cpk and ET vs. inline analysis.
  • Propose process and design optimization for devices to meet product requirements.

Other Responsibilities

  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications

  • Actively pursuing a Bachelor’s degree in Electrical Engineering, Physics, Materials Science, Chemical Engineering, or an equivalent field.
  • Must be in good academic standing.
  • Ability to work at least 40 hours per week during the internship.
  • Available for a 16–24 week credit-bearing internship commencing January 2027.

Preferred Qualifications

  • Prior related internship or co-op experience.
  • Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
  • Project management skills, including the ability to innovate and execute on solutions that matter and to navigate ambiguity.
  • Some knowledge of device physics and CMOS process integration.

Application Notes

Please indicate your internship period clearly in your CV/resume/cover letter.

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