Hardware Engineer Internship - Summer 2027

Hudson River Trading (HRT) — Hardware Engineering Summer 2027 Internship

The Hardware team at Hudson River Trading (HRT) builds high-performance compute engines using FPGA and ASIC technologies to support low-latency trading decisions across global markets. The FPGA/ASIC Design and Verification teams collaborate closely—pushing boundaries in low-level computer architecture, logic design, tool writing, and the interface between hardware and software. The Hardware Engineering Summer 2027 Internship offers candidates the opportunity to explore both Design and Verification roles.

During the internship, you will create hardware in SystemVerilog (design) and build complex modeling and testing environments in Python (verification). You can expect to work in a fast-paced, real-time environment supporting critical infrastructure, while being challenged by ever-changing financial markets.

What to Expect

• A challenging and meaningful summer internship program introducing technical facets of hardware engineering in the algorithmic trading industry
• Independent projects deepening your understanding of HRT’s hardware design and verification environments
• Opportunities to work with and learn more about cutting-edge FPGA/ASIC technology
• Training followed by direct project work within your first two weeks
• Exposure to HRT’s research and trading infrastructure, including areas you may not work on directly
• Opportunities to learn about and gain a deeper understanding of the financial markets

Requirements

• Full-time student in a Computer Engineering, Electrical Engineering, or related program
• Graduating and seeking full-time roles in 2028
• Thorough understanding of digital logic design and/or computer architecture
• Experience using a hardware design language such as SystemVerilog
• Familiarity with C++ and/or Python
• Knowledge of Linux and familiarity with the command prompt
• Passion for technology and curiosity about how systems work “under the hood”
• Exceptional problem-solving skills
• Bonus: Familiarity with FPGAs or ASICs
• Bonus: Exposure to a hardware verification flow such as UVM, or open-source verification tools such as cocotb

Compensation

Weekly base salary of 5,800 USD, plus a competitive signing bonus and company-paid housing, meals, and other perks.

Culture

Hudson River Trading (HRT) brings a scientific approach to trading financial products and has built one of the world’s most sophisticated computing environments for research and development. Researchers are at the forefront of innovation in algorithmic trading.

At HRT, you will find a community drawn from a variety of disciplines—including mathematics and computer science, physics and engineering, and media and tech. HRT values self-starters motivated by automation across the organization. Culture emphasizes openness and transparency, celebrates great ideas, and fosters a close-knit environment where colleagues support one another beyond the office.

HRT is proud of its diverse staff with offices around the globe, and offers equal employment opportunity to all.